JohnPhilipJones
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    • A). Binary and Number Systems Revision
    • B). Logic Gate Revision
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    • 1.2. Algorithms
    • 2.1 Binary
    • 3.1 Hardware
    • 3.2 Software
    • 6.2 Constructs
    • 6.5 Operators
    • 6.6. Subprograms
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    • 1. Basic Logic Gates
    • 2. Boolean Algebra
    • 3. Machine Code
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2. Boolean Algebra

Boolean algebra, expression minimising, axioms, theorems, Karnaugh Maps and combinational logic circuit design
  1. F = A + 1 = 1 >>
  2. F = A + 0 = A >>
  3. F = A And 0 = 0 >>
  4. F = A And 1 = A >>
  5. A Or Not(A) = 1 >>
  6. F = Not(Not(A)) = A >>
  7. F = A Or (A And B) >>
  8. A Or (Not(A) And B) = A Or B >>
  9. Associative Law (1 of 2) >>
  10. Associative Law (2 of 2) >>
  11. Commutative Laws >>
  12. Distributive Law (1 of 5) >>
  13. Distributive Law (2 of 5)>>
  14. Distributive Law (3 of 5) >>
  15. Distributive Law (4 of 5) >>
  16. Distributive Law (5 of 5) >>
  17. Introduction to Axioms >>
  18. Axioms >>
  19. Deriving a Theorem using axioms >>
  20. Deriving a Theorem >>
  21. Perfect Induction >>
  22. Two Variable Sum of Minterms >>
  23. Three Variable Sum of Minterms >>
  24. Four Variable Sum of Minterms >>
  25. Two Variable Karnaugh Map >>
  26. Karnaugh Map Examples (2 variables) >>
  27. Three Variable Karnaugh Map >>
  28. Karnaugh Map Examples (Three Variables) >>
  29. Four Variable Karnaugh Map >>
  30. Karnaugh Map Examples (4 variables) >>
  31. Combinational Logic Circuit Design >>
  32. Half Adder Design >>
  33. Half Subtractor Design >>
  34. De Morgan's Theorem >>
  35. Universal Logic (Nand Gates) >>.
  36. Half Adder Design (using universal gates) >>
  37. Half Adder Design (using Nor gates) >>
  38. Exclusive Or Gate >>
  39. Half Adder Design (XOR) >>
  40. Logic Circuit Design for Memory >>
  41. Combinational Logic Circuit Design (Memory) >>
  42. Combinational Logic Circuit Design (Four Chips) >>
  43. XOR gate >>
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